AMD is giving the public an advanced look at how its pending quad-core chip will improve performance and save energy.

AMD, playing catch-up to rival Intel, whose quad-core Xeon product launched in 2006, will discuss features of its quad-core product, code-named Barcelona, at the International Solid States Circuits Conference in San Francisco, a forum for engineers in solid state circuitry and system-on-a-chip processor design.

AMD says it will present details at the conference of how Barcelona, due for release in mid-2007, improves performance and energy efficiency over the competition and over its own dual-core processor, the Opteron, which it introduced in 2003.

Barcelona will feature "Enhanced PowerNow" technology, which dynamically adjusts core frequencies as workloads change in order to power down cores when not needed to save energy, said Brent Kerby, product marketing manager for Opteron.

Under the PowerNow technology already deployed in the dual-core Opteron, the operating system (OS) delivers to the busiest core the power it needs. If the other core is not as busy, it still receives the voltage demanded of the busiest core, Kerby said. But with Enhanced PowerNow, the busiest core receives the power it needs and the OS reduces the frequency and voltage of the remaining cores because they aren't as busy.

"We still see power savings with our current PowerNow technology, but it's going to get better with Barcelona because we're going to be able to dynamically and independently adjust the core frequencies of each individual core," he said.

Barcelona will use a more efficient approach as the OS will directly communicate with the central processing unit (CPU) instead of first going through the CPU driver, he said. "With Barcelona, there is no CPU driver middleman. The OS can tell the processor directly, 'Hey this is how much work I'm doing,' and the Barcelona core will determine when the best time is to make that change. It's not doing it blindly," he said.

Barcelona also separates the power management of the cores from that of the memory controller, which is embedded in AMD-designed processors. That way, frequency and voltage can be reduced to the cores when they are not busy and increased to the memory controller when it is busy, and vice versa. AMD claims an 80 percent reduction in memory controller power usage with this design change.

Barcelona will also feature enhanced clock-gating, allowing core logic circuits to be turned on or off to save power. Like settings on a coffee grinder, the chip can do ‘coarse’ or ‘fine’ clock gating, shutting down increasingly finer sections of core logic as needed.

AMD claims that Barcelona can deliver a 40 percent improvement in performance over ‘the competition’. While not mentioning Intel's Xeon specifically, AMD has long pointed out that its quad-core chip will be four cores designed on the same piece of silicon, while Intel's design is two dual-core processors packaged together.